Title : 
Step-response optimisation techniques for low-power, high-load, three-stage operational amplifiers driving large capacitive loads
         
        
            Author : 
Marano, Davide ; Palumbo, Gaetano ; Pennisi, Salvatore
         
        
            Author_Institution : 
DIEES (Dipt. di Ing. Elettr. Elettron. e dei Sist.), Univ. di Catania, Catania, Italy
         
        
        
        
        
            fDate : 
3/1/2010 12:00:00 AM
         
        
        
        
            Abstract : 
Two simple efficient techniques to optimise the closed-loop transient response of three-stage amplifiers for large capacitive load applications are proposed and developed. The proposed approaches exploit a current comparator in the inner amplifier nodes to sense the input voltage transients and to switch on an auxiliary driving device providing slew-rate enhancement and settling time improvement without extra static power dissipation. SPECTRE simulations are carried out on a three-stage amplifier adopting a recently proposed reversed-nested Miller compensation strategy with a voltage follower and two nulling resistors, for which a novel design methodology is provided as well. Simulation results confirm the effectiveness of the two proposed techniques, showing a symmetrical step response with a significant improvement in large-signal speed performance. Both proposed solutions are suitable for any particular three-stage amplifier topology and are also independent of the adopted compensation network.
         
        
            Keywords : 
network topology; operational amplifiers; optimisation; transient response; SPECTRE simulations; auxiliary driving device; closed-loop transient response; large capacitive load applications; reversed-nested Miller compensation strategy; settling time improvement; slew-rate enhancement; step-response optimisation techniques; three-stage amplifier topology; three-stage operational amplifiers; voltage follower;
         
        
        
            Journal_Title : 
Circuits, Devices & Systems, IET
         
        
        
        
        
            DOI : 
10.1049/iet-cds.2009.0126