Statistical analysis of dynamic variability in 28nm FD-SOI MOSFETs

Author

Ioannidis, E.G. ; Haendler, S. ; Theodorou, C.G. ; Planes, N. ; Dimitriadis, C.A. ; Ghibaudo, Gerard

Author_Institution

IMEP-LAHC, MINATEC, Grenoble, France

fYear

2014

fDate

22-26 Sept. 2014

Firstpage

214

Lastpage

217

Abstract

The impact of the dynamic variability due to low frequency and RTS fluctuations on single MOSFET operation from 28nm FD-SOI technology is investigated for the first time. It is shown that, for small rise time of ramp gate voltage, the drain current characteristics I_d(V_g) exhibit a huge sweep-to-sweep dispersion due to the low frequency noise. Such a single device dynamic variability, which scales as the reciprocal square root of device area, is added to the static mismatch contribution and could amount up to ≈30% of static variability sources.

Keywords

CMOS integrated circuits; MOSFET; semiconductor device measurement; silicon-on-insulator; statistical analysis; FD-SOI technology; MOSFET operation; RTS fluctuations; drain current characteristics; dynamic variability; low frequency noise; ramp gate voltage; reciprocal square root; size 28 nm; static mismatch contribution; static variability sources; statistical analysis; sweep-to-sweep dispersion; CMOS integrated circuits; Current measurement; Logic gates; Low-frequency noise; MOSFET; Standards; Time measurement;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid State Device Research Conference (ESSDERC), 2014 44th European

Conference_Location

Venice

ISSN

1930-8876

Print_ISBN

978-1-4799-4378-4

Type

conf

DOI

10.1109/ESSDERC.2014.6948798

Filename

6948798