Title :
Dynamic body charge modulation for sense amplifiers in partially depleted SOI technology
Author :
Kuang, Jente B. ; Allen, David H. ; Chuang, Ching-Te
Author_Institution :
IBM Corp., Rochester, MN, USA
fDate :
4/1/2001 12:00:00 AM
Abstract :
We present a dynamic body charge modulation technique to improve the matching of CMOS device threshold voltage (Vt) characteristics in the partially depleted silicon-on-insulator (SOI) technology. For a latch-type sense amplifier in the SRAM complementary bitline structure, a pair of-charging FETs are employed to bring the bodies of cross-coupled sensing devices to the voltage rail. In doing so, operating history-dependent body potential mismatches are eliminated for every access cycle. Body-contacted FETs are returned to their floating body states when the charging action is completed. This technique achieves repeatable low-Vt and high-performance operation simultaneously. The pulse signal controlling body charging is not constrained by a stringent timing requirement. Therefore, its effectiveness is insensitive to the body contact quality of sensing FETs. This technique demonstrates a significant leverage for high-performance RAM circuits. It also offers the advantages of speed and noise immunity in the low-voltage low-power operating regime
Keywords :
CMOS memory circuits; SRAM chips; amplifiers; low-power electronics; silicon-on-insulator; CMOS device; RAM circuit; SRAM complementary bitline structure; body contacted FET; cross-coupled sensing device; dynamic body charge modulation; floating body state; latch-type sense amplifier; low-voltage low-power operation; partially depleted SOI technology; pulse signal; threshold voltage; CMOS memory circuits; CMOS technology; Circuit topology; FETs; Rail to rail amplifiers; Random access memory; Read-write memory; Silicon on insulator technology; Threshold voltage; Timing;
Journal_Title :
Solid-State Circuits, IEEE Journal of