DocumentCode
1460845
Title
A 3.3-V CMOS 10.7-MHz sixth-order bandpass ΣΔ modulator with 74-dB dynamic range
Author
Cusinato, Paolo ; Tonietto, Davide ; Stefani, Fabrizio ; Baschirotto, Andrea
Author_Institution
STMicroelectron., Milan, Italy
Volume
36
Issue
4
fYear
2001
fDate
4/1/2001 12:00:00 AM
Firstpage
629
Lastpage
638
Abstract
A 3.3-V bandpass ΣΔ modulator for IF sampling at 10.7 MHz in digital radio applications has been developed. The modulator presents a sixth-order single-loop architecture and features a 74-dB dynamic range in a 2OO-kHz signal bandwidth (FM signal), while for a 9-kHz signal bandwidth (AM signal) the dynamic range is 88 dB. The modulator has been integrated in a standard 0.35-μm CMOS technology using switched-capacitor technique and consumes 76 mW from a single 3.3V supply
Keywords
CMOS integrated circuits; digital radio; sigma-delta modulation; switched capacitor networks; 0.35 micron; 10.7 MHz; 200 kHz; 3.3 V; 76 mW; 9 kHz; CMOS technology; IF sampling; digital radio applications; dynamic range; signal bandwidth; sixth-order bandpass sigma-delta modulator; sixth-order single-loop architecture; switched-capacitor technique; Analog-digital conversion; Bandwidth; Baseband; CMOS technology; Delta modulation; Digital communication; Digital modulation; Dynamic range; Receivers; Sampling methods;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/4.913741
Filename
913741
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