Speed and accuracy enhancement techniques for high-performance switched-current comparators

Author

Worapisher, A. ; Hughes, John B. ; Toumazou, Chris

Author_Institution

Philips Res. Labs., Surrey, UK

Volume

36

Issue

4

fYear

2001

fDate

4/1/2001 12:00:00 AM

Firstpage

687

Lastpage

690

Abstract

Design techniques for a high-performance switched-current (SI) comparator suitable for low supply voltage operation is presented. To achieve accuracy and speed enhancement with minimum penalty to noise and power, two practical schemes, namely the error-neutralization and double-regeneration techniques, are introduced. An experimental enhanced comparator achieves 9-bit resolution at an operating speed of over 100 MHz and 2.5-V supply voltage while dissipating less than 2.1 mW. These results indicate an improvement in resolution of more than 2 bits and speed of more than 30% over those of a basic SI comparator operating at the same power consumption

Keywords

current comparators; high-speed integrated circuits; integrated circuit design; low-power electronics; switched current circuits; 100 MHz; 2.1 mW; 2.5 V; current mode signal processing; design technique; double regeneration; error neutralization; high-speed integrated circuit; low-voltage operation; power consumption; resolution; switched current comparator; CMOS process; Calibration; Capacitors; Energy consumption; Helium; Low voltage; Signal processing; Signal resolution; Standards development; Switching circuits;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.913747

Filename

913747