Title :
Effects of constant voltage stress on organic complementary logic inverters
Author :
Wrachien, N. ; Cester, A. ; Lago, N. ; Meneghesso, Gaudenzio ; D´Alpaos, R. ; Stefani, A. ; Turatti, G. ; Muccini, M.
Author_Institution :
Dept. of Inf. Eng., Univ. of Padova, Padua, Italy
Abstract :
We subjected all-organic complementary inverters to constant voltage stress. We found a 20% maximum variation of DC inverter parameters after a 104-s stress. The largest degradation was in the delay times, which increase up to a factor 7. This is due to the threshold voltage variation in pTFTs and the mobility reduction in nTFTs.
Keywords :
logic gates; thin film transistors; DC inverter parameters; all-organic complementary inverters; constant voltage stress; mobility reduction; nTFT; organic complementary logic inverters; organic thin-film-transistors; pTFT; threshold voltage variation; Degradation; Inverters; Logic gates; Organic thin film transistors; Stress; Threshold voltage; complementary inverters; organic TFT;
Conference_Titel :
Solid State Device Research Conference (ESSDERC), 2014 44th European
Conference_Location :
Venice
Print_ISBN :
978-1-4799-4378-4
DOI :
10.1109/ESSDERC.2014.6948819
