DocumentCode :
146197
Title :
Three digital closed loops reference generating platform for protective relay testing
Author :
Wenwen Zhou ; Qian Xiang ; Zhichuan Wei ; Rui Yu
Author_Institution :
PONOVO Power Co., Ltd., Beijing, China
fYear :
2014
fDate :
March 31 2014-April 3 2014
Firstpage :
1
Lastpage :
4
Abstract :
This paper presents a highly integrated sinusoid reference generating system based on Microblaze, suitable for precise testing of protective relays. Microblaze, a soft CPU core, was embedded in a FPGA that integrates an ADC interface, a DAC interface, an EEPROM and other peripherals. The prototype and transfer functions of various types of digital filters were designed with reference to the characteristic of the required output signal. Their functional behaviour were implemented in the system on chip using a recursion algorithm. As a critical factor in the digital reference design, a detailed discussion has been performed to introduce the theory of three types of closed-loop control, i.e. amplitude, frequency and phase control. A digital PI control algorithm was implemented in the system to satisfy the control target. The experimental results indicate that the relay evaluation system, using this sinusoid reference, operates correctly. The paper will demonstrate how the performance of the output sine signal improves, as compared with the normal sine reference, especially when outputting low amplitude signals. The research methodology of this reference system and this highly integrated circuit are significant for the optimization of a relay testing system, and provide a theoretical justification and a feasible implementation for a precise relay testing system.
Keywords :
EPROM; PI control; analogue-digital conversion; closed loop systems; control engineering computing; digital control; digital filters; digital-analogue conversion; field programmable gate arrays; integrated circuit design; integrated circuit testing; power engineering computing; relay protection; system-on-chip; ADC interface; DAC interface; EEPROM; FPGA; Microblaze; amplitude control; closed-loop control; digital PI control algorithm; digital closed loops reference generating platform; digital filters; digital reference design; frequency control; functional behaviour; output signal; phase control; protective relay testing system; recursion algorithm; sinusoid reference generating system; soft CPU core; system-on-chip; transfer functions; Closed-loop; Microblaze; protective relay testing; sinusoid reference;
fLanguage :
English
Publisher :
iet
Conference_Titel :
Developments in Power System Protection (DPSP 2014), 12th IET International Conference on
Conference_Location :
Copenhagen
Print_ISBN :
978-1-84919-834-9
Type :
conf
DOI :
10.1049/cp.2014.0157
Filename :
6822965
Link To Document :
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