An Engineering Model for Single-Event Effects and Soft Error Rates in Bulk CMOS

This paper describes a simple methodology for simulating single-event effects, including soft error rates, of bulk complementary metal-oxide semiconductor integrated circuits. The induced currents due to ion strikes are derived from the basic carrier transport equations and then used in simple SPICE simulations. The 3-D equations were reduced to a 1-D problem. This method is much less expensive than 3-D TCAD for predicting single-event effects, especially when several types of circuits or several critical circuit paths must be investigated. The upset conditions for two SRAMs are simulated, and the results compare well with experiments. A simple method for predicting the soft error rate is also described, including a method for calculating the dimensions of the sensitive volumes for a given circuit.