• DocumentCode
    1463480
  • Title

    Simplified digital lock-in amplifier algorithm

  • Author

    Leis, John ; Martin, Patrick ; Buttsworth, David

  • Author_Institution
    Univ. of Southern Queensland, Toowoomba, QLD, Australia
  • Volume
    48
  • Issue
    5
  • fYear
    2012
  • Firstpage
    259
  • Lastpage
    261
  • Abstract
    The phase-sensitive or `lock-in` amplifier is a fundamental tool in experimental physics, and is able to extract exceedingly small signals in the presence of noise. Recently, there has been some interest in portable or embedded lock-in amplifiers for instrumentation and sensing. One difficulty with digital lock-ins is the required degree of numerical precision. Presented is a fast algorithm for combined phase-sensitive multiplication and filtering. It exploits symmetry to reduce the number of arithmetic operations, and is suitable for low-power embedded devices. As well as being computationally much simpler than a direct digital implementation, the results presented show that it yields a lower error in the estimation of the underlying signal amplitude.
  • Keywords
    amplifiers; low-power electronics; digital lock-in amplifier algorithm; embedded lock-in amplifiers; low-power embedded devices; phase-sensitive amplifier; phase-sensitive filtering; phase-sensitive multiplication; signal amplitude estimation;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el.2012.0193
  • Filename
    6164313