Title :
Sorting networks implemented as νMOS circuits
Author :
Rodriguez, E. ; Quintana, J.M. ; Avedillo, M.J. ; Rueda, A.
Author_Institution :
Inst. de Microelectron. de Sevilla, Seville Univ., Spain
fDate :
11/12/1998 12:00:00 AM
Abstract :
A new realisation for n-input sorters is presented. Resorting to the neuron-MOS (νMOS) concept and to an adequate electrical scheme, a compact and efficient implementation is obtained
Keywords :
MOS integrated circuits; νMOS circuit; neuron MOS circuit; sorting network;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19981562
