• DocumentCode
    14644
  • Title

    Formation of Through Silicon Vias for Silicon Interposer in Wafer Level by Metal-Assisted Chemical Etching

  • Author

    Liyi Li ; Guoping Zhang ; Ching-Ping Wong

  • Author_Institution
    Sch. of Mater. Sci. & Eng., Georgia Inst. of Technol., Atlanta, GA, USA
  • Volume
    5
  • Issue
    8
  • fYear
    2015
  • fDate
    Aug. 2015
  • Firstpage
    1039
  • Lastpage
    1049
  • Abstract
    This paper reports a novel wet chemical etching method, referred to as uniform metal-assisted chemical etching (MaCE), for uniform hole formation in fabrication of through silicon vias (TSVs) on silicon (Si) interposer in wafer level. In MaCE, a layer of Au as catalyst is deposited on the photolithography-patterned Si surface. Uniform holes are formed by simply immersing the Au-loaded Si into a hydrofluoric acid-hydrogen peroxide aqueous solution. In a typical experiment, ~1 million holes are formed after MaCE for 4 h at room temperature over a 4-in Si wafer with a diameter of 28 μm, a depth of 162 μm, a pitch size of 80 μm, and a sidewall roughness below 50 nm. The holes show high geometric uniformity in wafer level, with their depth in the range 159-164 μm, the diameter in 27.1-29.7 μm, and high verticality. Simultaneous etching of two wafers in the same batch is also demonstrated. The TSV etched by MaCE show compatibility with SiO2 deposition by plasma-enhanced chemical vapor deposition and copper filling by electroplating. The reported method provides an approach for manufacturing TSV on Si interposer with simple operation, high geometric uniformity, high throughput, and low cost.
  • Keywords
    catalysts; copper; electroplating; gold; photolithography; plasma CVD; semiconductor technology; silicon; three-dimensional integrated circuits; Au; MaCE; Si; SiO2; TSV; catalyst; copper filling; electroplating; geometric uniformity; hydrofluoric acid-hydrogen peroxide aqueous solution; metal-assisted chemical etching; photolithography-patterned surface; plasma-enhanced chemical vapor deposition; silicon interposer; silicon wafer; through silicon via; uniform hole formation; wafer level; wet chemical etching method; Chemicals; Etching; Gold; Lithography; Resists; Silicon; Metal-assisted chemical etching (MaCE); silicon interposer; through silicon vias (TSVs); through silicon vias (TSVs).;
  • fLanguage
    English
  • Journal_Title
    Components, Packaging and Manufacturing Technology, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    2156-3950
  • Type

    jour

  • DOI
    10.1109/TCPMT.2015.2443728
  • Filename
    7159048