• DocumentCode
    1464699
  • Title

    Simulation of a high performance MOSFET with a quantum wire structure incorporating a periodically bent Si-SiO2 interface

  • Author

    Tanaka, Junko ; Sawada, Akemi

  • Author_Institution
    Central Res. Lab., Hitachi Ltd., Tokyo, Japan
  • Volume
    43
  • Issue
    12
  • fYear
    1996
  • fDate
    12/1/1996 12:00:00 AM
  • Firstpage
    2185
  • Lastpage
    2189
  • Abstract
    A MOSFET using a serrated quantum wire structure that produces one-dimensional electron confinement shows excellent subthreshold characteristics and enhanced drive capability compared to a conventional MOSFET with a flat Si-SiO2 interface. We studied the quantum wire structure with its periodically bent Si-SiO2 interface using simulations. The potential in the convex regions of the silicon is 0.34 V higher than that in the concave ones when the bending angle is 90°, the bending period is 100 nm, substrate doping is 3.0×10 17 cm-3, and a gate voltage is 0.1 V. Because of this increase in potential in the convex regions, electrons are confined in a narrow width of 13 nm in the convex regions. This 1-D electron confinement effect by the bent Si-SiO2 interface is clearly observed at low gate voltage and is reduced as the gate voltage becomes higher. Due to the confinement effect, drain current in the MOSFET with this quantum wire structure is 270 times higher than that of a MOSFET with a flat Si-SiO2 interface at a gate voltage of 0.05 V. In addition, the short-channel effect is more effectively suppressed in this MOSFET than in a conventional MOSFET
  • Keywords
    MOSFET; semiconductor device models; semiconductor quantum wells; semiconductor quantum wires; MOSFET; Si-SiO2; drain current; drive capability; one-dimensional electron confinement; periodically bent Si-SiO2 interface; serrated quantum wire; short-channel effect; simulation; subthreshold characteristics; Doping; Electron mobility; Electrons; Gallium arsenide; Heterojunctions; Low voltage; MOSFET circuits; Quantum mechanics; Silicon; Substrates; Wire;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/16.544390
  • Filename
    544390