Article summaries

Author

Hurson, A.R. ; Kavi, Krishna M. ; Shirazi, Behrooz ; Lee, Ben

Author_Institution

Dept. of Comput. Sci. & Eng., Pennsylvania State Univ., University Park, PA, USA

Volume

4

Issue

4

fYear

1996

Firstpage

11

Lastpage

11

Abstract

The dataflow model of computation, particularly the recent trend in combining dataflow processing with control flow processing, provides attractive alternatives for designing new computer architectures. This marriage has also motivated researchers to analyze how to apply the familiar concepts within the framework of this new architectural model. The concept of cache memory has proven its effectiveness in the traditional control flow architecture because of the spatial and temporal localities that govern the organization of the conventional programming environment. Therefore, the authors investigate the presence of localities in dataflow programs and analyze whether the cache can be incorporated into dataflow architectures. Addressing the application of cache memory in the dataflow environment, the authors compare the control flow and dataflow programming environments, address previous work to incorporate cache in the dataflow computation, and discuss how to improve and detect locality in a dataflow program.

Keywords

cache storage; parallel architectures; parallel machines; parallel programming; architectural model; cache memories; computer architectures; control flow architecture; control flow processing; dataflow architectures; dataflow computation; dataflow environment; dataflow processing; dataflow program; dataflow programming environments; dataflow systems; temporal localities; Application software; Computer architecture; Concurrent computing; Control systems; Delay; Hardware; Parallel processing; Processor scheduling; Transistors;

fLanguage

English

Journal_Title

Parallel & Distributed Technology: Systems & Applications, IEEE

Publisher

ieee

ISSN

1063-6552

Type

jour

DOI

10.1109/88.544436

Filename

544436