• DocumentCode
    1465125
  • Title

    Parallel architectures: Techniques for compiler-directed cache coherence

  • Author

    Choi, Lynn ; Lim, Hock-Beng ; Yew, Pen-Chung

  • Author_Institution
    Intel Corporation
  • Volume
    4
  • Issue
    4
  • fYear
    1996
  • Firstpage
    23
  • Lastpage
    34
  • Abstract
    Compiler-directed cache coherence can help close the gap between processor and memory speed. The authors explain the concepts underlying techniques and survey various approaches to this strategy.
  • fLanguage
    English
  • Journal_Title
    Parallel & Distributed Technology: Systems & Applications, IEEE
  • Publisher
    ieee
  • ISSN
    1063-6552
  • Type

    jour

  • DOI
    10.1109/M-PDT.1996.544438
  • Filename
    544438
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1465125