DocumentCode :
1465580
Title :
Realistic yield-evaluation of fault-tolerant programmable logic arrays
Author :
Battaglini, Gianluca ; Ciciani, Bruno
Author_Institution :
Rome Univ., Italy
Volume :
47
Issue :
3
fYear :
1998
fDate :
9/1/1998 12:00:00 AM
Firstpage :
212
Lastpage :
224
Abstract :
When analytic yield-evaluation methods for fault tolerant systems are being considered, the question of their capacity to represent and conform to reality soon becomes apparent. The goodness of analytic yield-evaluation methods depends on their ability to account for the relationship between basic and faulty components and the reconfiguration strategy (R-S). With regards to redundant programmable logic arrays (RPLA), two R-S have been proposed in the literature: static R-S: the diagnosis and the reconfiguration phases are performed independently, dynamic R-S: the diagnosis and the reconfiguration phases, for some kind of faults, are performed simultaneously. This paper highlights the necessity to model the: relationship between faulty and basic components, and adopted R-S, in order to achieve a realistic yield evaluation. We show that the yield evaluation method used in the literature for two R-S for fault tolerant RPLA is unrealistic; we propose to use two analytic yield-evaluation methods, each of which is adopted for a specific R-S. These two methods are based on fault pattern statistics, and are: Markov based method (MBM) fault pattern & reconfiguration method (FP&RM). They model the steps implemented in the R-S. Extensive Monte Carlo based simulation experiments validate the analytic approach. We present two comparisons: qualitative: between realistic yield evaluation methods and the yield evaluation method of RPLA proposed in the literature; and quantitative: between the static R-S and dynamic R-S
Keywords :
Monte Carlo methods; failure analysis; fault diagnosis; fault tolerance; hidden Markov models; programmable logic arrays; redundancy; Markov based method; Markov chain; Monte Carlo based simulation; analytic yield-evaluation methods; basic components; dynamic reconfiguration strategy; fault distribution; fault pattern; fault pattern and reconfiguration method; fault pattern statistics; fault tolerant systems; fault-tolerant programmable logic arrays; faulty components; manufacturing fault; realistic yield evaluation methods; realistic yield-evaluation; reconfiguration phases; redundant programmable logic array; static reconfiguration strategy; yield evaluation method; Fault diagnosis; Fault tolerance; Fault tolerant systems; Independent component analysis; Monte Carlo methods; Phased arrays; Programmable logic arrays; Programmable logic devices; Reconfigurable logic; Statistics;
fLanguage :
English
Journal_Title :
Reliability, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9529
Type :
jour
DOI :
10.1109/24.740487
Filename :
740487
Link To Document :
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