Analysis of Removal of Surface-State-Related Lags and Current Slump in GaAs FETs

Author

Hafiz, H. ; Kumeno, M. ; Horio, K.

Author_Institution

Fac. of Syst. Eng., Shibaura Inst. of Technol., Saitama, Japan

Volume

34

Issue

11

fYear

2013

fDate

Nov. 2013

Firstpage

1361

Lastpage

1363

Abstract

Two-dimensional transient analysis of field-plate GaAs MESFETs is performed by considering surface states in the region from the gate toward the drain. Quasi-pulsed current-voltage curves are derived from the transient characteristics. It is shown that drain lag and current slump because of surface states are reduced by introducing a field plate longer than the surface-state region. Dependence of drain lag, gate lag, and current slump on the field-plate length and SiO₂ passivation layer thickness is studied, indicating that the lags and current slump can be completely removed in a case with a thin SiO₂ layer.

Keywords

III-V semiconductors; Schottky gate field effect transistors; gallium arsenide; silicon compounds; surface states; transient analysis; FET; GaAs; SiO₂; current slump; drain lag; field-plate length; gate lag; passivation layer thickness; quasipulsed voltage curves; surface-state-related lags removal; two-dimensional transient analysis; Current slump; Gallium arsenide; Gallium nitride; HEMTs; Logic gates; MODFETs; Transient analysis; 2-D analysis; GaAs field effect transistor (FET); current slump; drain lag; gate lag; surface state;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/LED.2013.2279833

Filename

6603270