• DocumentCode
    1466255
  • Title

    Solutions Strategies for Die Shift Problem in Wafer Level Compression Molding

  • Author

    Sharma, Gaurav ; Kumar, Aditya ; Rao, Vempati Srinivas ; Ho, Soon Wee ; Kripesh, Vaidyanathan

  • Author_Institution
    Technol. Marketing Dept., STATS ChipPAC, Ltd., Singapore, Singapore
  • Volume
    1
  • Issue
    4
  • fYear
    2011
  • fDate
    4/1/2011 12:00:00 AM
  • Firstpage
    502
  • Lastpage
    509
  • Abstract
    Die shift problem that arises during the wafer molding process in embedded micro wafer level package fabrication was systematically analyzed and solution strategies were developed. A methodology to measure die shift was developed and applied to create maps of die shift on an 8 inch wafer. A total of 256 dies were embedded in an 8 inch mold compound wafer using compression molding. Thermal and cure shrinkages of mold compound are determined to be the primary reasons for die shift in wafer molding. Die shift value increases as the distance from the center of the wafer increases. Pre-compensation of die shift during pick and place is demonstrated as an effective method to control die shift. Applying pre-compensation method 99% of dies can be achieved to have die shift values of less than 40 μm. Usage of carrier wafer during wafer molding reduces the maximum die shift in a wafer from 633 μm to 79 μm. Die area/package area ratio has a strong influence on the die shift values. Die area/package area ratios of 0.81, 0.49, and 0.25 lead to maximum die shift values of 26, 76, and 97 μ.m, respectively. Wafer molding using low coefficient of thermal expansion (7 × 10-6/°C) and low cure shrinkage (0.094%) mold compounds is demonstrated to yield maximum die shift value of 28 μm over the whole 8 inch wafer area.
  • Keywords
    compression moulding; thermal management (packaging); wafer level packaging; carrier wafer; compound wafer; cure shrinkage; die shift problem; microwafer level package fabrication; size 633 mum to 79 mum; thermal expansion; thermal shrinkage; wafer level compression molding; wafer molding process; Compounds; Copper; Fabrication; Lithography; Packaging; Silicon; Die shift; embedded wafer level package; wafer molding;
  • fLanguage
    English
  • Journal_Title
    Components, Packaging and Manufacturing Technology, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    2156-3950
  • Type

    jour

  • DOI
    10.1109/TCPMT.2010.2100431
  • Filename
    5725172