DocumentCode :
1467036
Title :
A poly-Si thin-film transistor EEPROM cell with a folded floating gate
Author :
Hur, Sung-Hoi ; Lee, Nae-In ; Lee, Jin-Woo ; Han, Chul-Hi
Author_Institution :
Dept. of Electr. Eng., Korea Adv. Inst. of Sci. & Technol., Seoul, South Korea
Volume :
46
Issue :
2
fYear :
1999
fDate :
2/1/1999 12:00:00 AM
Firstpage :
436
Lastpage :
438
Abstract :
A new polysilicon thin-film transistor (poly-Si TFT) EEPROM with the folded floating gate structure has been proposed to suppress the field dependent leakage current at the programmed state. The control gate folds the floating gate and acts as a field plate to reduce the leakage current. As a result, the leakage current is maintained to the minimum level at an off-state control gate bias, irrespective of the programmed state, which is confirmed by simulation and experimental results. The fabricated poly-Si TFT EEPROM shows successful programming/erasing operation with a threshold voltage shift of 1 V after 5×104 program and erase cycles
Keywords :
EPROM; elemental semiconductors; silicon; thin film transistors; Si; folded floating gate; leakage current; polysilicon thin film transistor EEPROM cell; threshold voltage; EPROM; Electrons; Flash memory; Leakage current; Microcontrollers; Nonvolatile memory; Programmable logic arrays; Programmable logic devices; Thin film transistors; Threshold voltage;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/16.740915
Filename :
740915
Link To Document :
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