Title :
An experimental 16-Mbit DRAM with reduced peak-current noise
Author :
Chin, Daeje ; Kim, Changhyun ; Choi, Yunho ; Min, Dong-Sun ; Hwang, Hong Sun ; Choi, Hoon ; Cho, Sooin ; Chung, Tae Young ; Park, Chan J. ; Shin, Yunseung ; Suh, Kwangpyuk ; Park, Yong E.
Author_Institution :
Semiconductor Business Research and Development Center, Samsung Electronics Company, Ltd., Kynngtci-Do, Korea.
Abstract :
An experimental 16-Mbit CMOS DRAM with die size of 8.52 X18.4 mm2 has been developed. A trenched and saddled stack capacitor (TSSC) cell was invented, and storage capacitance of 30fF was obtained in a cell size of 1.65 x 3.339 ?spl mu/m2. Peak-current noise on the power buses during the sense-amplifier latching is suppressed by distributing large numbers of pull-down and pull-up drivers in memory core arrays. Two 4-V internal Vcc converters are used separately for peripheral and core array circuits. The reference voltage generator employs a bandgap reference circuit whose temperature stability is better than conventional MOS diode references.
Keywords :
Capacitance; Capacitors; Circuit noise; Driver circuits; Latches; Noise reduction; Photonic band gap; Random access memory; Semiconductor device noise; Voltage;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.1989.572578
