DocumentCode
1467418
Title
Merged CMOS/bipolar current switch logic (MCSL)
Author
Heimsch, Wolfgang ; Hoffmann, Birgit ; Krebs, Roland ; Müllner, Ernst G. ; PfÄffel, Bruno ; Ziemann, Klaus
Author_Institution
Corporate Res. & Dev. Siemens AG, Munich, West Germany
Volume
24
Issue
5
fYear
1989
fDate
10/1/1989 12:00:00 AM
Firstpage
1307
Lastpage
1311
Abstract
A merged CMOS/bipolar current switch logic (MCSL) is presented. CMOS/ECL level conversion and logical operation are realized simultaneously. This circuit technique allows a supply voltage reduction to 3.3 V. A carry delay time of 150 ps/bit for a 4-bit BiCMOS full adder was measured. This is about five times faster than an optimized CMOS adder.
Keywords
BIMOS integrated circuits; adders; integrated logic circuits; 150 ps; 3.3 V; BiCMOS full adder; CMOS/ECL level conversion; MCSL; carry delay time; merged CMOS/bipolar current switch logic; supply voltage reduction; Adders; Associate members; BiCMOS integrated circuits; CMOS logic circuits; Capacitance; Delay; Delay effects; Energy consumption; Switches; Switching circuits; Time measurement; Voltage;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1989.572603
Filename
572603
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