DocumentCode :
1467467
Title :
A feedback-type BiCMOS logic gate
Author :
Nishio, Yoji ; Murabayashi, Fumio ; Kotoku, Shoichi ; Watnabe, A. ; Shukuri, Shoji ; Shimohigashi, Katsuhiro
Author_Institution :
Hitachi Res. Lab., Hitachi Ltd., Ibaraki, Japan
Volume :
24
Issue :
5
fYear :
1989
fDate :
10/1/1989 12:00:00 AM
Firstpage :
1360
Lastpage :
1362
Abstract :
The authors report on the development of a feedback-type BiCMOS logic gate using a 0.5- mu m BiCMOS technology. The propagation delay time of a three-input NAND gate with a 0.93-pF load is 245 and 290 ps at a supply voltage of 4.5 and 4 V, respectively. These values are about 1.4-1.2 times better than the 0.8- mu m BiCMOS gate operating at 5 V. A power dissipation of 0.4 mW was obtained with a 0.93-pF load, 4-V supply voltage, and 140-MHz operation. The power dissipation is comparable to that of a CMOS gate.
Keywords :
BIMOS integrated circuits; feedback; integrated logic circuits; logic gates; 0.4 mW; 0.5 micron; 0.93 pF; 14 MHz; 245 to 290 ps; 4 to 4.5 V; BiCMOS logic gate; feedback-type; power dissipation; propagation delay time; three-input NAND gate; BiCMOS integrated circuits; Bipolar transistors; CMOS technology; Laboratories; Logic devices; Logic gates; MOSFETs; Power dissipation; Propagation delay; Pulse inverters; Threshold voltage; Voltage;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.1989.572614
Filename :
572614
Link To Document :
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