• DocumentCode
    1467581
  • Title

    Comments on ´A MOS implementation of totally self-checking checker for the 1-out-of-3 code´

  • Author

    Jha, Niraj K.

  • Author_Institution
    Dept. of Electr. Eng., Princeton Univ., NJ, USA
  • Volume
    24
  • Issue
    5
  • fYear
    1989
  • fDate
    10/1/1989 12:00:00 AM
  • Firstpage
    1470
  • Lastpage
    1471
  • Abstract
    Shows that the transistor count of the MOS totally self-checking (TSC) 1-out-of-3 code checker given can be reduced from 17 to 13. Similarly, the transistor count of the 2-out-of-3 code checker can be reduced from 11 to 7.
  • Keywords
    MOS integrated circuits; integrated logic circuits; 1-out-of-3 code; MOS implementation; comments; totally self-checking checker; transistor count reduction; Built-in self-test; Circuit faults; Feeds; Inverters; MOSFETs;
  • fLanguage
    English
  • Journal_Title
    Solid-State Circuits, IEEE Journal of
  • Publisher
    ieee
  • ISSN
    0018-9200
  • Type

    jour

  • DOI
    10.1109/JSSC.1989.572651
  • Filename
    572651
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1467581