DocumentCode
1468927
Title
Automatic synthesis of extended burst-mode circuits. II. (Automatic synthesis)
Author
Yun, Kenneth Y. ; Dill, David L.
Author_Institution
Dept. of Electr. & Comput. Eng., California Univ., San Diego, La Jolla, CA, USA
Volume
18
Issue
2
fYear
1999
fDate
2/1/1999 12:00:00 AM
Firstpage
118
Lastpage
132
Abstract
We introduce a new design style called extended burst-mode. The extended burst-mode design style covers a wide spectrum of sequential circuits ranging from delay-insensitive to synchronous. We can synthesize multiple-input change asynchronous finite state machines and many circuits that fall in the gray area (hard to classify as synchronous or asynchronous) which are difficult or impossible to synthesize automatically using existing methods. Our implementation of extended burst-mode machines uses standard CMOS logic, generates low-latency outputs, and guarantees freedom from hazards at the gate level. In Part II, we present a complete set of automated sequential synthesis algorithms: hazard-free state assignment, hazard-free state minimization, and critical-rare-free state encoding. Experimental data from a large set of examples are presented and compared to competing methods whenever possible
Keywords
CMOS logic circuits; asynchronous circuits; finite state machines; logic CAD; sequential circuits; CMOS logic synthesis; asynchronous finite state machine; automated sequential synthesis algorithm; automatic synthesis; critical-race-free state encoding; delay-insensitive circuit; extended burst-mode circuit; hazard-free state assignment; hazard-free state minimization; sequential circuit; synchronous circuit; Automatic control; CMOS logic circuits; Circuit synthesis; Encoding; Hazards; Law; Legal factors; Minimization methods; Sequential circuits; Signal synthesis;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/43.743715
Filename
743715
Link To Document