DocumentCode
1468943
Title
A DRC-based algorithm for extraction of critical areas for opens in large VLSI circuits
Author
Pleskacz, Witold A. ; Ouyang, Charles H. ; Maly, Wojciech
Author_Institution
Inst. of Microelectron. & Optoelectron., Warsaw Univ. of Technol., Poland
Volume
18
Issue
2
fYear
1999
fDate
2/1/1999 12:00:00 AM
Firstpage
151
Lastpage
162
Abstract
This paper describes an algorithm for the extraction of the critical area for opens. The presented algorithm allows for the analysis of industrial size ICs with non-Manhattan geometry. Illustrative examples of the proposed algorithm, implemented by using design rule checker operations, are presented. It is shown that the extraction of the critical area for realistic size VLSI circuits designs can be done in an acceptable time
Keywords
VLSI; fault simulation; integrated circuit design; integrated circuit modelling; DRC algorithm; VLSI IC; critical area; design rule checker; nonManhattan geometry; open fault; parameter extraction; Algorithm design and analysis; Circuit faults; Circuit synthesis; Conducting materials; Contacts; Geometry; Insulation; Integrated circuit interconnections; Very large scale integration; Yield estimation;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/43.743724
Filename
743724
Link To Document