Return-Path Extraction Technique for SSO Analysis of Low-Cost Wire-Bonding BGA Packages

A return-path decomposition method that eliminates artificial return-path discontinuities is presented. The methodology is applied to over 2 Gb/s simultaneous switching output analysis of a low-cost wire-bonding-type ball grid array package with a 32-bit double-data rate interface. The analysis is based on true transistor-level signal-power simulation and a large-scale, full-wave full 3-D boundary element method field solver package model. The simulation results suggest that in a weak return-path system, such as a wire-bonding-type package, the I/O performance is mainly dominated by the signal channel design rather than the power supply design in over 2-Gb/s region. The power supply acts as a secondary signal return path rather than as a noise source. The power supply design should be more focused on the main driver/predriver power supply noise interference in those systems.