Title :
Physical origin of negative differential resistance in SOI transistors
Author :
McDaid, L.J. ; Hall, S. ; Mellor, P.H. ; Eccleston, W. ; Alderman, J.C.
Author_Institution :
Dept. of Electr. Eng. & Electron., Liverpool Univ., UK
fDate :
6/22/1989 12:00:00 AM
Abstract :
From a two-dimensional solution of Laplace´s equation it is shown that a significant increase in temperature occurs in the channel of SOI transistors due to the relatively poor thermal conductivity of the buried insulator. Based on this simulation an equation is derived which predicts that at small channel lengths the pinchoff point is shifted, an effect which is consistent with experimental observations. In addition, the positive ´kink´ is reduced with the negative differential resistance, can be explained by a temperature increase in the channel.
Keywords :
insulated gate field effect transistors; negative resistance effects; semiconductor device models; semiconductor-insulator boundaries; SOI transistors; Si-SiO 2; buried insulator; experimental observations; increase in temperature; model; negative differential resistance; physical origin; pinchoff point shift; poor thermal conductivity; positive kink reduction; small channel lengths; thermal resistance; thin film MOS transistors; two-dimensional solution of Laplace´s equation;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19890557
