DocumentCode
1469301
Title
A Low-Power High-PSRR Low-Dropout Regulator With Bulk-Gate Controlled Circuit
Author
Heng, Socheat ; Pham, Cong-Kha
Author_Institution
Seiko Instrum. Inc., Chiba, Japan
Volume
57
Issue
4
fYear
2010
fDate
4/1/2010 12:00:00 AM
Firstpage
245
Lastpage
249
Abstract
In this brief, we presented a bulk-gate controlled circuit for improving a power supply rejection ratio (PSRR) of a low-dropout voltage regulator (LDO), which deteriorated due to lowering of a power consumption. A test chip was fabricated using a 0.18-??m complimentary metal-oxide-semiconductor process, and experimental results demonstrated that the proposed circuit provides the PSRR that improved to 77 dB at 10 Hz and 64.3 dB at 1 kHz, while the consumption current of the whole LDO with all component circuits was 8.5 ??A without a load and 35 ??A with a full load.
Keywords
CMOS integrated circuits; low-power electronics; power supply circuits; voltage regulators; bulk-gate controlled circuit; complimentary metal-oxide-semiconductor process; frequency 1 kHz; frequency 10 Hz; low-dropout voltage regulator; low-power high-PSRR; power supply rejection ratio; size 0.18 micron; Error amplifier; low power; low voltage; low-dropout regulator; power supply rejection ratio (PSRR);
fLanguage
English
Journal_Title
Circuits and Systems II: Express Briefs, IEEE Transactions on
Publisher
ieee
ISSN
1549-7747
Type
jour
DOI
10.1109/TCSII.2010.2043390
Filename
5446424
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