Design of arithmetic circuit using Quaternary Signed Digit Number system

Propagation delay and circuit complexity are major issues in design of digital circuit. In the binary number system, the computation speed is depends upon the formation and propagation of carry especially as the number of bits increases. Quaternary Signed Digit number system has redundancy property using these one may perform fast arithmetic operations that are carry free addition, multiplication and borrow free subtraction. A carry free arithmetic operation can be achieved using a higher radix number system such as Quaternary Signed Digit (QSD). QSD number system can be represented by a numbers -3, -2, -1, 0, 1, 2, 3. Addition, subtraction and other operations on a large number of bits such as 64, 128, 256, 512 or more can be implemented with constant delay and less complexity which is linearly increases. Design is simulated & synthesized using Xilinx.