DocumentCode
1469716
Title
A New Differential P-Channel Logic-Compatible Multiple-Time Programmable (MTP) Memory Cell With Self-Recovery Operation
Author
Lee, Te-Liang ; Tsai, Yi-Hung ; Lin, Wun-Jie ; Yang, Hsiao-Lan ; Lien, Chiu-Wang ; Lin, Chrong Jung ; King, Ya-Chin
Author_Institution
Inst. of Electron. Eng., Nat. Tsing-Hua Univ., Hsinchu, Taiwan
Volume
32
Issue
5
fYear
2011
fDate
5/1/2011 12:00:00 AM
Firstpage
587
Lastpage
589
Abstract
This letter presents a novel differential p-channel logic-compatible multiple-time programmable (MTP) memory cell. This MTP cell has a pair of floating gates, and performs differential read to increase the on/off window. Additionally, a novel self-recovery operation is implemented to boost the floating gate level, thus avoiding the charge-loss problem due to the thin gate oxide requirement in advance logic nonvolatile memory applications. This differential cell with its self-recovery operation is a very promising MTP solution for gate oxide layer with a 70 Å thickness, and can be implemented by 3.3 V I/O in 90 nm and the advanced CMOS logic processes such as 45 nm and beyond.
Keywords
CMOS logic circuits; programmable logic devices; random-access storage; MTP cell; advance logic nonvolatile memory; advanced CMOS logic process; charge-loss problem; differential P-Channel logic-compatible multiple-time programmable memory cell; floating gates; gate oxide layer; self-recovery operation; size 45 nm; size 90 nm; voltage 3.3 V; Boosting; CMOS integrated circuits; Degradation; Logic gates; Nonvolatile memory; Patents; Tunneling; Differential read; floating gate logic nonvolatile memories; logic-nonvolatile memory (NVM); multiple-time programmable (MTP); p-channel nonvolatile memory (NVM);
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/LED.2011.2111451
Filename
5729315
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