DocumentCode
1469917
Title
Implicit computation of compatible sets for state minimization of ISFSMs
Author
Kam, Timothy ; Villa, Tiziano ; Brayton, Robert K. ; Vincentelli, Alberto L Sangiovanni
Author_Institution
Strategic CAD Labs., Intel Corp., Hillsboro, OR, USA
Volume
16
Issue
7
fYear
1997
fDate
7/1/1997 12:00:00 AM
Firstpage
657
Lastpage
676
Abstract
The computation of sets of compatibles of incompletely specified finite-state machines (ISFSMs) is a key step in sequential synthesis. This paper presents implicit computations to obtain sets of maximal compatibles, compatibles, prime compatibles, implied sets, and class sets. The computations are implemented by means of BDDs that realize the characteristic functions of these sets. We have demonstrated with experiments from a variety of benchmarks that implicit techniques allow us to handle examples exhibiting a number of compatibles up to 21500, an achievement outside the scope of programs based on explicit enumeration. We have shown, in practice, that ISFMSs with a very large number of compatibles may be produced as intermediate steps of logic synthesis algorithms, for instance, in the case of asynchronous synthesis. This shows that the proposed approach not only has a theoretical interest, but also practical relevance for current logic synthesis applications, as shown by its application to ISFSM state minimization
Keywords
asynchronous circuits; finite state machines; logic design; minimisation of switching nets; sequential circuits; set theory; BDD; ISFSM; asynchronous synthesis; compatible sets; implicit computation; incompletely specified finite-state machine; logic synthesis algorithm; sequential synthesis; state minimization; Automata; Boolean functions; Data structures; Laboratories; Logic; Minimization methods;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/43.644029
Filename
644029
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