VHDL modeling and model testing for DSP applications

The use of hardware description language models is now central to the digital design process. These models represent the initial interpretation of the specification. They are also used as input to synthesis tools in the application-specific integrated circuit design process central to the development of digital signal processor circuits. In this paper, the use of high-level graphics-based modeling tools is advocated to relieve the modeler of the burden of hand coding the models. A similar approach is advocated for developing test benches that test the models. Models and test benches are refined in a library structure. Environmental data generators are used to prepare test files to be read by the test benches. The test benches are linked directly to the specification and test plans control the test bench configuration. This approach is applied to infrared search and track and synthetic aperture radar systems