Using multivariate nested distributions to model semiconductor manufacturing processes

This paper demonstrates the advantages of modeling semiconductor process variability using a multivariate nested distribution. This distribution allows estimation not only of correlation among various model parameters, but also allows each of those variations to he apportioned among the various stages of the process (i.e., wafer-to-wafer, lot-to-lot, etc.). This permits matched devices to be more accurately simulated, without having to develop customized models for each configuration of matching. The technique also provides focus for process improvement efforts into those areas with the maximum potential reward. Test structures have been designed and fabricated to facilitate extraction of the parameters for the multivariate nested distribution. Using data from a sample of these structures, a process model is built and analyzed; Monte Carlo techniques are then employed using SPICE and a probabilistic process model to predict the performance of a multiplying digital-to-analog converter (MDAC), and the results are compared to measured data from fabricated circuits. Simulations performed using a model built using the multivariate nested approach are shown to provide superior results when compared to simulations using currently accepted multivariate normal models