DocumentCode :
1472197
Title :
GaAs heterostructure FET frequency dividers fabricated with high-yield 0.5 mu m direct-write trilevel-gate-resist
Author :
Ren, F. ; Resnick, D.J. ; Atwood, D.K. ; Tu, C.W. ; Kopf, R.F. ; Shah, N.J.
Author_Institution :
AT&T Bell Labs., Murray Hill, NJ, USA
Volume :
25
Issue :
24
fYear :
1989
Firstpage :
1631
Lastpage :
1632
Abstract :
Frequency dividers and FET test structures have been fabricated on selectively doped n+AlGaAs/GaAs heterostructure FETs (HFETs) with 0.5 mu m gate length electron-beam direct-writing on a novel trilevel resist, EBR-9/Ge/PMGI. A divide-by-two master-slave frequency divider fabricated with direct-coupled FET logic gates operated up to 9.3 GHz. The input frequency range of a divide-by-two transmission-gate frequency divider was from 3.2 to 12.2 GHz, with a supply voltage of 1.2 V at room temperature. The average propagation delay (fan-in and fan-out=1) was 18.2 ps/gate, with a power dissipation of 3.9 mW/stage. With a 3.5 mu m source-drain spacing, a peak transconductance of 360 mS/mm was measured. The functional yield of both discrete devices and circuits was 92% across 2 in-diameter wafers.
Keywords :
III-V semiconductors; digital integrated circuits; electron resists; field effect integrated circuits; frequency dividers; gallium arsenide; 0.5 micron; 3.2 to 12.2 GHz; AlGaAs-GaAs; EBR-9/Ge/PMGI; FET test structures; average propagation delay; direct-write trilevel-gate-resist; divide-by-two transmission-gate frequency divider; electron-beam direct-writing; frequency dividers; functional yield; heterostructure FET; input frequency range; master-slave frequency divider; peak transconductance; power dissipation; source-drain spacing; supply voltage;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el:19891093
Filename :
91832
Link To Document :
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