DocumentCode :
14724
Title :
A Proposal for a Novel Hybrid Interconnect Technology for the End of Roadmap
Author :
Chenyun Pan ; Naeemi, Azad
Author_Institution :
Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
Volume :
35
Issue :
2
fYear :
2014
fDate :
Feb. 2014
Firstpage :
250
Lastpage :
252
Abstract :
To suppress the impact of size effects on sub-20 nm wide wires, a novel aluminum-copper hybrid interconnect architecture is proposed and its potential performance has been quantified. Al wires offer lower resistivities at nanoscale dimensions because they do not need diffusion barriers, and size effects are less prominent in them due to their smaller bulk mean free path. However, their current conduction capacity is substantially lower than that of Cu wires. To get around this limitation, this letter proposes a hybrid interconnect technology to replace only short narrow local signal wires by Al wires. This scheme takes advantage of the fact that signal wires conduct bi-directional currents and are therefore virtually immune to electromigration. The improvement in chip clock frequency is predicted to be between 50% and 100% for the 7 nm technology node.
Keywords :
aluminium; copper; integrated circuit interconnections; nanoelectronics; wires (electric); Al; Cu; aluminum copper hybrid interconnect architecture; bidirectional currents; bulk mean free path; chip clock frequency; current conduction capacity; electromigration; hybrid interconnect technology; nanoscale dimensions; signal wires; size 7 nm; size effects; Clocks; Conductivity; Electromigration; Grain size; Integrated circuit interconnections; Resistance; Wires; Al-Cu hybrid interconnect; Interconnect; performance analysis; subtractive process; system-level design;
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/LED.2013.2291783
Filename :
6679211
Link To Document :
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