Title :
Development of a Low-Noise Front-End Readout Chip Integrated With a High-Resolution TDC for APD-Based Small-Animal PET
Author :
Fang, X.C. ; Gao, W. ; Hu-Guo, Ch ; Brasse, D. ; Humbert, B. ; Hu, Y.
Author_Institution :
Inst. Pluridisciplinaire Hubert CURIEN, UDS, Strasbourg, France
fDate :
4/1/2011 12:00:00 AM
Abstract :
This paper presents the design of a low-noise multi-channel front-end readout chip integrated with a high-resolution TDC. It is foreseen to be used as front-end readout electronics of Avalanche Photo Diodes (APD) dedicated to a small animal Positron Emission Tomography (PET) system. The architecture of the chip is reported. Two prototype chips, a ten-channel front-end chip and a three-channel high-resolution TDC, have been designed in AMS 0.35 μm CMOS technology. A low-noise charge-sensitive amplifier (CSA) and a shaper are integrated in each channel of the front-end chip. The proposed CSA performs a compensation of the 40 nA dark current coming from the detector. An equivalent input noise charge of 275 e- + 10 e-/pF (rms) has been obtained from test. The TDC chip is based on coarse-fine two-level conversion scheme. In the coarse conversion, a 10-bit counter is employed to achieve a wide range. Meanwhile, the time interpolation using an array of delay-locked loops is proposed for fine conversion. The measured time range is 10 μs. The bin size has been achieved from 71 ps to 142 ps with a reference clock from 100 MHz to 50 MHz.
Keywords :
CMOS integrated circuits; analogue-digital conversion; avalanche photodiodes; delay lock loops; image processing equipment; interpolation; low noise amplifiers; positron emission tomography; readout electronics; 10-bit counter; AMS CMOS technology; APD-based small-animal PET; avalanche photodiodes; coarse conversion; coarse-fine two-level conversion scheme; dark current; delay-locked loop array; equivalent input noise charge; frequency 100 MHz to 50 MHz; high-resolution TDC; low-noise charge-sensitive amplifier; low-noise integrated multichannel front-end readout chip; prototype chips; reference clock; size 0.35 mum; ten-channel front-end chip; three-channel high-resolution TDC; time interpolation; Arrays; Clocks; Delay; Detectors; Positron emission tomography; Prototypes; Radiation detectors; Charge sensitive amplifier (CSA); delay locked loop (DLL); positron emission tomography (PET); time-to-digital converter (TDC);
Journal_Title :
Nuclear Science, IEEE Transactions on
DOI :
10.1109/TNS.2011.2113191