Title :
Designing UltraSparc for testability
Author_Institution :
Sun Microsyst. Inc., Mountain View, CA., USA
Abstract :
With a focus on a short time to volume production, the UltraSparc microprocessor design incorporated innovative features that optimize test, debug and manufacture. The following areas are discussed: goals; cost-benefit analysis; scan design; decoded multiplexer; test generation flow; custom circuit blocks; boundary cell design; embedded array testing; and clock control features
Keywords :
design for testability; microprocessor chips; program debugging; UltraSparc; boundary cell design; clock control features; cost-benefit analysis; custom circuit blocks; debug; decoded multiplexer; designing for testability; embedded array testing; innovative features; manufacture; microprocessor design; scan design; test generation flow; Buffer storage; CMOS technology; Clocks; Computer aided manufacturing; Flip-flops; Graphics; Hardware design languages; Microprocessors; System testing; Videoconference;
Journal_Title :
Design & Test of Computers, IEEE
