Full functionality of LSI gate arrays fabricated on 3-in-diameter, MOCVD-grown GaAs-on-silicon substrates

Author

Ito, C. ; McIntyre, Douglas ; White, T. ; Feng, Ming ; Schoendube, R. ; Kaliski, R. ; Kim, H.B.

Author_Institution

Ford Microelectron. Inc., Colorado Springs, CO, USA

Volume

9

Issue

8

fYear

1988

Firstpage

371

Lastpage

373

Abstract

Fully functional, 504-gate arrays have been fabricated on an MOCVD (metalorganic chemical-vapor deposition)-grown, 3-in-diameter, GaAs-on-silicon substrate. Each ECL (emitter-coupled-logic)-compatible gate array consists of an eight-bit adder, a D flip-flop, a 214 divider (with a divide-by-four tap), and a 263-stage inverter string. These circuits represent 90% gate utilization, or approximately 6600 transistors. The wafer-level yield of fully functional gate arrays is 10.7%. This demonstrates total functionality and yield for a digital circuit with LSI-level complexity using MOCVD-grown GaAs-on-silicon material and shows that this material, even with defect densities greater than 108 cm/sup -2/, is viable for high-density LSI circuits.<>

Keywords

III-V semiconductors; bipolar integrated circuits; cellular arrays; chemical vapour deposition; emitter-coupled logic; integrated logic circuits; large scale integration; 263-stage inverter string; D flip-flop; ECL; GaAs-Si; LSI gate arrays; MOCVD; adder; defect densities; divider; gate utilization; high-density LSI circuits; metalorganic chemical-vapor deposition; total functionality; wafer-level yield; Adders; Digital circuits; FETs; Flip-flops; Gallium arsenide; Inverters; Large scale integration; Logic arrays; Random access memory; Silicon;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/55.747

Filename

747