Title :
On Reducing Hidden Redundant Memory Accesses for DSP Applications
Author :
Wang, Meng ; Shao, Zili ; Xue, Jingling
Author_Institution :
Dept. of Comput., Hong Kong Polytech. Univ., Kowloon, China
fDate :
6/1/2011 12:00:00 AM
Abstract :
Reducing memory accesses is particularly important for digital signal processing (DSP) applications since they are widely used in embedded systems and need to be executed with high performance and low power consumption. In this paper, we propose a machine-independent loop memory access optimization technique, redundant load exploration and migration (REALM), to explore hidden redundant load operations and migrate them outside loops based on loop-carried data dependence analysis. We implement REALM into IMPACT and Trimaran. To the best of our knowledge, this is the first work to implement the memory access reduction with loop-carried data reuse in real world compilers. We conduct experiments using a set of benchmarks from DSPstone and MiBench on the cycle-accurate VLIW simulator of Trimaran. The experimental results show that our technique significantly reduces the number of memory accesses.
Keywords :
digital signal processing chips; embedded systems; memory architecture; DSP application; DSPstone; MiBench; VLIW simulator; digital signal processing application; embedded system; hidden redundant memory access reduction; loop-carried data dependence analysis; low power consumption; machine-independent loop memory access optimization; redundant load exploration; Councils; Data analysis; Digital signal processing; Embedded system; Energy consumption; Helium; Optimizing compilers; Processor scheduling; Signal processing; VLIW; Digital signal processing (DSP) applications; instruction scheduling; loop optimization; memory optimization;
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
DOI :
10.1109/TVLSI.2010.2043963