Optimization of the dual ramp voltmeter

The paper describes the problems that are likely to be encountered when designing a voltmeter which uses the dual ramp technique. The compromises that are necessary especially with the switching of the reference and input signals are dealt with. The sources of all the major errors are investigated and the techniques that can be employed to reducethem are described. A method of adjusting the integration period to equal always one cycle of the mains frequency is described. This gives a high immunity to noise on the mains.