Title :
A latching-type driver circuit using capacitively-shunted HTS ramp-edge-type junctions
Author :
Hato, Tsunehiro ; Harada, Naoki ; Ishimaru, Yoshihiro ; Yoshida, Akira ; Yokoyama, Naoki
Author_Institution :
Fujitsu Labs. Ltd., Atsugi, Japan
fDate :
3/1/2001 12:00:00 AM
Abstract :
We developed a latching-type driver using capacitively shunted high-temperature superconductivity (HTS) junctions for Single-Flux-Quantum (SFQ)-semiconductor output interfaces and fabricated it using ramp-edge-type HTS junctions. Assuming a junction IcRn product of 2 mV, a circuit simulation shows that the driver can produce an output of about 8 mV from an SFQ input pulse with a sufficiently short rise time for an interface clock operation of several gigahertz. HTS junctions were fabricated using the interface engineering method, and capacitors were made from an Indium oxide insulator (the dielectric constant was about 23 at 20 K) sandwiched by YBa2Cu3 O7-x (YBCO) electrodes. The hysteresis of the I-V characteristics of the junctions increased by increasing the area of capacitance. The latching operation of the driver was observed with an output voltage of up to 3 mV
Keywords :
barium compounds; driver circuits; flip-flops; high-temperature superconductors; superconducting logic circuits; superconductor-semiconductor boundaries; yttrium compounds; I-V characteristics; In2O3; SFQ-semiconductor interface; YBCO electrode; YBa2Cu3O7; capacitance; capacitively-shunted ramp-edge Josephson junction; circuit simulation; high temperature superconductor; hysteresis; indium oxide capacitor; interface engineering; latching-type driver circuit; Capacitors; Circuit simulation; Clocks; Dielectric constant; Dielectrics and electrical insulation; Driver circuits; High temperature superconductors; Indium; Pulse circuits; Superconductivity;
Journal_Title :
Applied Superconductivity, IEEE Transactions on
