New BSFQ circuit designs with wide margins

Author

Teh, Chen Kong ; Okabe, Yoichi

Author_Institution

Dept. of Electron. Eng., Tokyo Univ., Japan

Volume

11

Issue

1

fYear

2001

fDate

3/1/2001 12:00:00 AM

Firstpage

970

Lastpage

973

Abstract

Recently we have proposed novel Boolean Single-Flux-quantum (BSPQ) circuits, which just like CMOS circuits support Boolean primitives directly, and do not require local synchronization for each operation cell. However, previous BSFQ AND, OR, and XOR cells suffered from problems with narrow margin, where their critical margins hardly exceeded ±10% due to low flux gain. Furthermore, while being suitable for combinational circuits, previous BSFQ NOT cells had initialization problems in sequential circuits. In this paper, new versions of these circuits with simulated margins beyond ±30% are proposed. Moreover, a Muller C-element, an error canceller, a destructive read-out (DRO), and a demultiplexer are also newly created. The operation time, parameter margins, and circuit size of these BSFQ cells are comparable to those of the conventional RSFQ cells

Keywords

Boolean algebra; asynchronous circuits; superconducting logic circuits; BSFQ circuit design; Boolean single flux quantum circuit; Muller C-element; asynchronous circuit; circuit size; demultiplexer; destructive readout; error canceller; flux level logic system; operation time; parameter margin; Asynchronous circuits; Boolean functions; CMOS logic circuits; Clocks; Josephson junctions; Logic circuits; Submillimeter wave technology; Synchronization; Timing; Very large scale integration;

fLanguage

English

Journal_Title

Applied Superconductivity, IEEE Transactions on

Publisher

ieee

ISSN

1051-8223

Type

jour

DOI

10.1109/77.919510

Filename

919510