DocumentCode :
1476165
Title :
Chip-Level Thermoelectric Power Generators Based on High-Density Silicon Nanowire Array Prepared With Top-Down CMOS Technology
Author :
Li, Y. ; Buddharaju, K. ; Singh, N. ; Lo, G.Q. ; Lee, S.J.
Author_Institution :
Inst. of Microelectron., Agency for Sci., Technol. & Res., Singapore, Singapore
Volume :
32
Issue :
5
fYear :
2011
fDate :
5/1/2011 12:00:00 AM
Firstpage :
674
Lastpage :
676
Abstract :
This letter, for the first time, reports a high-density silicon-nanowire (SiNW)-based thermoelectric generator (TEG) prepared by a top-down CMOS-compatible technique. The 5 mm × 5 mm TEG comprises of densely packed alternating n- and p-type SiNW bundles with each wire having a diameter of 80 nm and a height of 1 μm. Each bundle serving as an individual thermoelectric element, having 540 × 540 wires, was connected electrically in series and thermally in parallel. The fabricated TEG demonstrates thermoelectric power generation with an open circuit voltage (Voc) of 1.5 mV and a short circuit current (Isc) of 3.79 μA with an estimated temperature gradient across the device of 0.12 K.
Keywords :
CMOS integrated circuits; nanowires; silicon; thermoelectric conversion; Si; TEG; chip-level thermoelectric power generators; current 3.79 muA; high-density silicon nanowire array; high-density silicon-nanowire; open circuit voltage; short circuit current; temperature 0.12 K; temperature gradient estimation; top-down CMOS technology; voltage 1.5 mV; Heating; Nanoscale devices; Silicon; Thermal resistance; Wire; Energy harvesting; power; silicon nanowire; thermoelectric;
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/LED.2011.2114634
Filename :
5735183
Link To Document :
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