CMOS technology-year 2010 and beyond

Author

Iwai, Hiroshi

Author_Institution

Toshiba Corp., Kawasaki, Japan

Volume

34

Issue

3

fYear

1999

fDate

3/1/1999 12:00:00 AM

Firstpage

357

Lastpage

366

Abstract

MOS large-scale-integration circuits (LSIs), having advanced remarkably during the past 25 years, are expected to continue to progress well into the next century. The progress has been driven by the downsizing of the components in an LSI, such as MOSFETs. However, even before the downsizing of MOSFETs reaches its fundamental limit, the downsizing is expected to encounter severe technological and economic problems at the beginning of next century when the minimum feature size of LSIs is going to shift to 0.1 and sub-0.1 μm. In this paper, the anticipated difficulties and some concepts for 0.1- and sub-0.1 μm LSIs are explained based on the research of the downsizing MOSFET into such a dimension, and a further concept for deep sub-0.1-μm LSIs is described

Keywords

CMOS integrated circuits; MOSFET; integrated circuit technology; large scale integration; technological forecasting; 0.1 micron; CMOS technology; CMOSFETs; MOSFET downsizing; deep submicron LSI; large-scale-integration; CMOS integrated circuits; CMOS technology; Calculators; Costs; Economics; Integrated circuit technology; Large scale integration; MOSFET circuits; Microprocessors; Random access memory;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.748187

Filename

748187