DocumentCode :
1477053
Title :
Computation of lower bounds for switching activity using decision theory
Author :
Krishna, Vamsi ; Chandramouli, R. ; Ranganathan, N.
Author_Institution :
Center for Microelectron. Res., Univ. of South Florida, Tampa, FL, USA
Volume :
7
Issue :
1
fYear :
1999
fDate :
3/1/1999 12:00:00 AM
Firstpage :
125
Lastpage :
129
Abstract :
Accurate switching-activity estimation is crucial for power budgeting. It is impractical to obtain an accurate estimate by simulating the circuit for all possible inputs. An alternate approach would be to compute tight bounds for the switching activity. In this paper, we propose a nonsimulative decision theoretic method to compute the lower bound for switching activity. First, we show that the switching activity can be modeled as the decision error of an abstract two-class problem. It is shown that the Bayes error L* is a lower bound for the switching activity. Further, we improve L* to obtain a tighter bound L/sub 1/, which is based on the one-nearest neighbor classification error. The proposed lower bounds are used for switching-activity characterization at the register transfer (RT) level. Experimental results for the RT-level switching-activity estimates for ISCAS´85 circuits are presented. This technique is simple and fast and produces accurate estimates.
Keywords :
VLSI; decision theory; integrated circuit design; low-power electronics; Bayes error; VLSI circuit; decision theory; low power design; nearest neighbour classification error; register transfer level; switching activity; Circuit simulation; Circuit synthesis; Computational modeling; Decision theory; Energy consumption; Power dissipation; Registers; Switching circuits; Upper bound; Very large scale integration;
fLanguage :
English
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
1063-8210
Type :
jour
DOI :
10.1109/92.748209
Filename :
748209
Link To Document :
بازگشت