Power efficient digital IC design for a medical application with high reliability requirements

For a design which is tolerant to parameter variations caused by process, voltage, temperature and aging, precise monitoring of the reliability status becomes a prerequisite. In applications such as medical implants reliability in combination with power efficiency is a crucial design goal. In the monitoring approach presented in this paper, circuit level timing properties are measured and utilized for reliability diagnosis. In situ timing monitors are inserted and fabricated within the digital front end of a neural measurement system. The monitors can distinguish between critical and relaxed operation. Extracted timing information is used for on-line adaptation of the supply voltage in order to reduce aging as well as the power consumption of the implants. The supply voltage of the digital circuitry is decreased to the minimum possible value, while ensuring reliable operation of the circuit. The quantitative evaluations on simulation and measurement results support the applicability of the proposed monitoring methodology for the neural measurement system.