• DocumentCode
    1479037
  • Title

    Automatic coefficients design for high-order sigma-delta modulators

  • Author

    Kuo, Tai-Haur ; Chen, Kuan-Dar ; Chen, Jhy-Rong

  • Author_Institution
    Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan, Taiwan
  • Volume
    46
  • Issue
    1
  • fYear
    1999
  • fDate
    1/1/1999 12:00:00 AM
  • Firstpage
    6
  • Lastpage
    15
  • Abstract
    An automatic-design methodology for designing high-tolerance modulator coefficients for high-order sigma-delta modulators (SDMs) from system specifications is presented. The methodology covers many design concerns including SDM coefficient tolerances for circuit component mismatch, stability, reduction of in-band tones, design tradeoffs among in-band noise suppression, oversampling ratio, and modulator order. Moreover, a high-order SDM synthesis tool (HOST) based on the methodology has been implemented in a C language program. Even for inexperienced designers, reliable and high-tolerance SDM coefficients for various applications can be automatically and efficiently generated using HOST. For synthesized SDM´s with orders from three to eight and oversampling ratios from 32 to 256, coefficient variations within 2% (1% for the eighth order) are allowed and the resulting peak signal-to-noise ratio degradation is less than 3 dB. Several design examples synthesized by HOST are included
  • Keywords
    C language; circuit CAD; circuit stability; integrated circuit design; integrated circuit noise; sigma-delta modulation; C language program; HOST; automatic-design methodology; circuit component mismatch; coefficient variations; design tradeoffs; high-order SDM synthesis tool; high-order sigma-delta modulators; high-tolerance modulator coefficients; in-band noise suppression; in-band tones; oversampling ratio; oversampling ratios; peak signal-to-noise ratio degradation; stability; Circuit noise; Circuit stability; Circuit synthesis; Degradation; Delta-sigma modulation; Design methodology; Noise reduction; PSNR; Signal synthesis; Signal to noise ratio;
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1057-7130
  • Type

    jour

  • DOI
    10.1109/82.749075
  • Filename
    749075