DocumentCode
1479277
Title
A 0.93-mA Spur-Enhanced Frequency Synthesizer for L1/L5 Dual-Band GPS/Galileo RF Receiver
Author
Hwang, In-Chul ; Baek, Donghyun
Author_Institution
Dept. of Electr. & Electron. Eng., Kangwon Nat. Univ., Chuncheon, South Korea
Volume
20
Issue
6
fYear
2010
fDate
6/1/2010 12:00:00 AM
Firstpage
355
Lastpage
357
Abstract
A versatile frequency synthesizer for a L1/L5 dual-band GPS/Galilleo dual-mode RF receiver is designed with a 0.13 ??m CMOS process. For spur reduction, a simple low-glitch charge-pump circuit (CPC) is proposed in this letter. The fabricated chip achieves the in-band phase noise of -92 dBc/Hz and the spur performance of -71.23 dBc at 8.184 MHz offset from 1.571 GHz carrier with a second-order loop filter.
Keywords
CMOS integrated circuits; Global Positioning System; charge pump circuits; frequency synthesizers; phase noise; radio receivers; CPC; current 0.93 mA; dual-band GPS RF receiver; dual-band Galileo RF receiver; frequency 1.571 GHz; frequency 8.184 MHz; in-band phase noise; low-glitch charge-pump circuit; second-order loop filter; size 0.13 mum; spur performance; spur-enhanced frequency synthesizer; Charge pump circuit; GPS; Galileo; frequency synthesizers; phase locked loops; phase noise; reference spur;
fLanguage
English
Journal_Title
Microwave and Wireless Components Letters, IEEE
Publisher
ieee
ISSN
1531-1309
Type
jour
DOI
10.1109/LMWC.2010.2047533
Filename
5454340
Link To Document