An analytical model for the CMOS inverter

Author

Chaourani, P. ; Messaris, I. ; Fasarakis, N. ; Ntogramatzi, M. ; Goudos, S. ; Nikolaidis, S.

Author_Institution

Dept. of Phys., Aristotle Univ. of Thessaloniki, Thessaloniki, Greece

fYear

2014

fDate

Sept. 29 2014-Oct. 1 2014

Firstpage

1

Lastpage

6

Abstract

A new analytical model for the CMOS inverter is introduced. This model results by solving analytically the differential equation which describes the inverter operation. It uses new simplified transistor current expressions which are developed taking into account the nanoscale effects and also considering temperature as a parameter. Expressions for the output voltage are derived, which are then used for capturing the output and supply currents, making the model compatible with CCS technology requirements. The proposed model is parametric according to the input signal slew, output load, transistor widths, supply voltage, temperature and process parameters. It presents an average error less than 3% for the typical case.

Keywords

CMOS logic circuits; integrated circuit modelling; logic gates; CCS technology; CMOS inverter; analytical model; input signal slew; output load; process parameters; simplified transistor current expressions; supply voltage; temperature parameters; transistor widths; Accuracy; Analytical models; Inverters; Semiconductor device modeling; Temperature dependence; Threshold voltage; Transistors; CCS technology; Inverter modeling; output current model; simulation; timing model; transistor current model;

fLanguage

English

Publisher

ieee

Conference_Titel

Power and Timing Modeling, Optimization and Simulation (PATMOS), 2014 24th International Workshop on

Conference_Location

Palma de Mallorca

Type

conf

DOI

10.1109/PATMOS.2014.6951894

Filename

6951894