• DocumentCode
    1479808
  • Title

    Analogue CMOS Hebbian synapses

  • Author

    Schneider, C.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Manitoba Univ., Winnipeg, Man., Canada
  • Volume
    27
  • Issue
    9
  • fYear
    1991
  • fDate
    4/25/1991 12:00:00 AM
  • Firstpage
    785
  • Lastpage
    786
  • Abstract
    CMOS VLSI circuits for the implementation of analogue Hebbian synapses with in situ learning have been designed, fabricated and tested. Investigations show that neural architectures of this type can tolerate highly imperfect analogue computational components, resulting in single-chip neural networks performing six to 20 billion multiplications per second.
  • Keywords
    CMOS integrated circuits; VLSI; analogue computer circuits; learning systems; linear integrated circuits; neural nets; parallel architectures; CMOS VLSI circuits; analogue Hebbian synapses; neural architectures; onchip learning; single-chip neural networks;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19910489
  • Filename
    74921
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1479808