A monolithic CMOS 20-b analog-to-digital converter

Author

Leopold, Hans A. ; Winkler, Gunter ; O´Leary, Paul ; Ilzer, Karl ; Jernej, Juergen

Author_Institution

Dept. of Electron., Tech. Univ. of Graz, Austria

Volume

26

Issue

7

fYear

1991

fDate

7/1/1991 12:00:00 AM

Firstpage

910

Lastpage

916

Abstract

The authors present a monolithic 20-b analog-to-digital converter (ADC) based on an oversampling feedback architecture. The converter consists of a time-continuous integrator at the input, a pulsewidth modulator in the forward branch of the loop (corresponding to a 10-b ADC), and a 1-b DAC (digital-to-analog converter) to generate the feedback voltage. The digital evaluation is carried out with a uniformly weighted rectangular window filter. The circuit is implemented in a standard 2-μm CMOS n-well process and requires 14 mm² of silicon, including the pads. Measurement results are presented that demonstrate the feasibility of this architecture for 20-b accuracy. The complete circuit has a power consumption of 6.7 mW

Keywords

CMOS integrated circuits; analogue-digital conversion; feedback; 2 micron; 20 bit resolution; 6.7 mW; A/D convertor; CMOS n-well process; feedback voltage; monolithic ADC; oversampling feedback architecture; power consumption; pulsewidth modulator; rectangular window filter; time-continuous integrator; Analog-digital conversion; Circuits; Digital filters; Digital modulation; Digital-analog conversion; Feedback loop; Pulse generation; Pulse modulation; Pulse width modulation converters; Voltage;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.92009

Filename

92009